Method for manufacturing semiconductor apparatus having fluorine containing region formed in recessed portion of semiconductor layer

Patent metadata

Field	Value
Publication number	US-9123793-B2
Application number	US-201414450838-A
Country	US
Kind code	B2
Filing date	Aug 4, 2014
Priority date	Dec 10, 2010
Publication date	Sep 1, 2015
Grant date	Sep 1, 2015

Abstract

A semiconductor apparatus includes a first semiconductor layer formed on a substrate, a second semiconductor layer formed on the first semiconductor layer, a gate recess formed by removing at least a portion of the second semiconductor layer, an insulation film formed on the gate recess and the second semiconductor layer, a gate electrode formed on the gate recess via the insulation film, source and drain electrodes formed on one of the first and the second semiconductor layers, and a fluorine containing region formed in at least one of a part of the first semiconductor layer corresponding to a region in which the gate recess is formed and a part of the second semiconductor layer corresponding to the region in which the gate recess is formed.

First claim

What is claimed is:

1. A method for manufacturing a semiconductor apparatus, the method comprising:
forming a resist pattern on a semiconductor layer including first, second, and third semiconductor layers sequentially formed, on a substrate;
forming a gate recess by removing at least a portion of the third semiconductor layer;
admitting fluorine into a sidewall of the semiconductor layer corresponding to a region in which the gate recess is formed;
removing the resist patte…

Assignees

• Fujitsu Ltd

Inventors

• Ohki Toshihiro
• Endo Hiroshi

Classifications

• H10P50/691

  Electricity · mapped topic

• H10P50/242

  Electricity · mapped topic

• H10D64/013

  Electricity · mapped topic

• H10W90/756

  Electricity · mapped topic

• H10W72/527

  Electricity · mapped topic