Chip with through silicon via electrode and method of forming the same

Patent metadata

Field	Value
Publication number	US-9123789-B2
Application number	US-201313747492-A
Country	US
Kind code	B2
Filing date	Jan 23, 2013
Priority date	Jan 23, 2013
Publication date	Sep 1, 2015
Grant date	Sep 1, 2015

Abstract

The present invention provides a method of forming a chip with TSV electrode. A substrate with a first surface and a second surface is provided. A thinning process is performed from a side of the second surface so the second surface becomes a third surface. Next, a penetration via which penetrates through the first surface and the third surface is formed in the substrate. A patterned material layer is formed on the substrate, wherein the patterned material layer has an opening exposes the penetration via. A conductive layer is formed on the third surface thereby simultaneously forming a TSV electrode in the penetration via and a surface conductive layer in the opening.

First claim

What is claimed is:

1. A chip with a through-silicon-via (TSV) electrode, comprising:
a substrate, which has an active surface and a back surface;
a penetration via disposed in the substrate, wherein the penetration via penetrates through the active surface and the back surface;
a TSV electrode disposed in the penetration via;
a surface conductive layer disposed on the back surface outside the penetration via and directly contacting the back surface, wherein the surface cond…

Assignees

• United Microelectronics Corp

Inventors

• Lin Ming-Tse
• Lin Chu-Fu
• Kuo Chien-Li
• Lin Yung-Chang

Classifications

• H10W20/0245

  Electricity · mapped topic

• H10W20/0234

  Electricity · mapped topic

• H10W20/0242

  Electricity · mapped topic

• H10W20/0257

  Electricity · mapped topic

• H10P50/00

  Electricity · mapped topic