Semiconductor device and method for forming the same
US-2024395669-A1 · Nov 28, 2024 · US
Method and structures for heat dissipating interposers
US9123780B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9123780-B2 |
| Application number | US-201213720346-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 19, 2012 |
| Priority date | Dec 19, 2012 |
| Publication date | Sep 1, 2015 |
| Grant date | Sep 1, 2015 |
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Abstract
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A method for making an interconnect element includes depositing a thermally conductive layer on an in-process unit. The in-process unit includes a semiconductor material layer defining a surface and edges surrounding the surface, a plurality of conductive elements, each conductive element having a first portion extending through the semiconductor material layer and a second portion extending from the surface of the semiconductor material layer. Dielectric coatings extend over at least the second portion of each conductive element. The thermally conductive layer is deposited on the in-process unit at a thickness of at least 10 microns so as to overlie a portion of the surface of the semiconductor material layer between the second portions of the conductive elements with the dielectric coatings positioned between the conductive elements and the thermally conductive layer.
First claim
Opening claim text (preview).
The invention claimed is: 1. A method for making an interconnect element, comprising: depositing a thermally conductive layer on an in-process unit, the in-process unit including a semiconductor material layer defining a surface and edges surrounding the surface, a plurality of conductive elements, each conductive element having a first portion extending through the semiconductor material layer, a second portion extending from the surface of the semiconductor material layer, and d…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9123780B2 cover?
- A method for making an interconnect element includes depositing a thermally conductive layer on an in-process unit. The in-process unit includes a semiconductor material layer defining a surface and edges surrounding the surface, a plurality of conductive elements, each conductive element having a first portion extending through the semiconductor material layer and a second portion extending fr…
- Who is the assignee on this patent?
- Invensas Corp
- What technology area does this patent fall under?
- Primary CPC classification H10W20/20. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Sep 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).