Nonvolatile semiconductor memory device and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-9123749-B2
Application number	US-201314018836-A
Country	US
Kind code	B2
Filing date	Sep 5, 2013
Priority date	Mar 14, 2013
Publication date	Sep 1, 2015
Grant date	Sep 1, 2015

Abstract

According to one embodiment, a nonvolatile semiconductor memory device comprises a semiconductor substrate, a first layer, a first conductive layer, a second conductive layer, an insulating layer, a block insulating layer formed on an inner surface of a pair of through holes formed in the insulating layer, the second conductive layer, and the first conductive layer, and on an inner surface of a connecting hole formed in the first layer and configured, a charge storage layer formed on the block insulating layer, a tunnel insulating layer formed on the charge storage layer, and a semiconductor pillar formed on the tunnel insulating layer. The semiconductor pillar includes a doped silicide layer which is formed in the insulating layer, a silicon layer formed in the second conductive layer and the first conductive layer, and a silicide layer formed in first layer.

First claim

What is claimed is:

1. A nonvolatile semiconductor memory device comprising:
a semiconductor substrate;
a first layer formed above the semiconductor substrate;
a first conductive layer formed above the first layer;
a second conductive layer formed above the first conductive layer;
an insulating layer formed on the second conductive layer;
a block insulating layer formed on an inner surface of a pair of through holes formed in the insulating layer, the second conductive l…

Assignees

• Toshiba Kk

Inventors

• Kawai Tomoya
• Yasuda Naoki

Classifications

• H10D30/693

  Electricity · mapped topic

• H10D30/0413 Primary

  Electricity · mapped topic

• H01L29/66833 Primary

  Electricity · mapped topic

• H01L27/11582

  Electricity · mapped topic

• H01L29/7926

  Electricity · mapped topic