Multi-stack nanosheet structure including semiconductor device
US-2024023326-A1 · Jan 18, 2024 · US
US9123725B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9123725-B2 |
| Application number | US-201314088654-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 25, 2013 |
| Priority date | Dec 4, 2012 |
| Publication date | Sep 1, 2015 |
| Grant date | Sep 1, 2015 |
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A semiconductor device has improved reliability by preventing a fuse cut through a repair process from being electrically reconnected by electrochemical migration. The semiconductor device includes a substrate, a fuse including a first fuse pattern and a second fuse pattern formed at the same level on the substrate, the first fuse pattern and the second fuse pattern being spaced a first width apart from each other such that a gap in the fuse is disposed at a first location between the first fuse pattern and the second fuse pattern, and a first insulation layer formed on the first fuse pattern and the second fuse pattern, the first insulation layer including an opening above the first location and having a second width smaller than the first width.
Opening claim text (preview).
What is claimed is: 1. A semiconductor device comprising: a substrate; a fuse including a first fuse pattern and a second fuse pattern formed at a same level on the substrate, the first fuse pattern and the second fuse pattern being spaced a first width apart from each other such that a gap in the fuse is disposed at a first location between the first fuse pattern and the second fuse pattern; and a first insulation layer formed on the first fuse pattern and the second fuse pat…
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