Package substrate and semiconductor package including the same
US-2024429153-A1 · Dec 26, 2024 · US
US9123713B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9123713-B2 |
| Application number | US-201113989314-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 21, 2011 |
| Priority date | Nov 24, 2010 |
| Publication date | Sep 1, 2015 |
| Grant date | Sep 1, 2015 |
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Official abstract text for this publication.
A microelectronic structure includes a first row of contacts ( 14 ) and a second row of contacts ( 24 ) offset from the first row, so that the first and second rows cooperatively define pairs of contacts. These pairs of contacts include first pairs ( 30 a ) and second pairs ( 30 b ) arranged in alternating sequence in the row direction. The first pairs are provided with low connectors ( 32 a ), whereas the second pairs are provided with high connectors ( 32 b ). The high connectors and low connectors have sections vertically offset from one another to reduce mutual impedance between adjacent connectors.
Opening claim text (preview).
The invention claimed is: 1. A microelectronic structure comprising: (a) a first element having a first row of contacts extending in a row direction in a first plane; (b) a second element having a second row of contacts extending parallel to the first row of contacts, the second row of contacts being offset from the first row in a horizontal direction transverse to the row direction and offset upwardly in the vertical direction from the first row of contacts, the first-row and s…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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