Semiconductor device and method for forming the same
US-2024395669-A1 · Nov 28, 2024 · US
Integrated circuit constructions having through substrate vias and methods of forming integrated circuit constructions having through substrate vias
US9123700B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9123700-B2 |
| Application number | US-201213345422-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 6, 2012 |
| Priority date | Jan 6, 2012 |
| Publication date | Sep 1, 2015 |
| Grant date | Sep 1, 2015 |
How to read this patent
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
- Title
What the patent document calls the invention.
- Abstract
A short plain-language summary of the technical disclosure.
- Assignees and inventors
Who owns or filed the patent and who is credited as inventor.
- Key dates
Filing, priority, publication, and grant dates set the timeline.
- First independent claim
The legal scope of protection — read this for what is actually claimed.
- CPC / IPC classifications
Technology tags used to group this patent with similar filings.
- Citations and related patents
Prior art links and similar publications in this corpus.
Abstract
Official abstract text for this publication.
An integrated circuit construction includes a stack of two or more integrated circuit substrates. At least one of the substrates includes through substrate vias (TSVs) individually comprising opposing ends. A conductive bond pad is adjacent one of the ends on one side of the one substrate. A conductive solder mass is adjacent the other end projecting elevationally on the other side of the one substrate. Individual of the solder masses are bonded to a respective bond pad on an immediately adjacent substrate of the stack. Epoxy flux surrounds the individual solder masses. An epoxy material different in composition from the epoxy flux surrounds the epoxy flux on the individual solder masses. Methods of forming integrated circuit constructions are also disclosed.
First claim
Opening claim text (preview).
The invention claimed is: 1. An integrated circuit construction, comprising: a stack of two or more integrated circuit substrates, at least one of the substrates comprising through substrate vias (TSVs) individually comprising opposing ends, a conductive bond pad adjacent one of the ends on one side of the one substrate and a conductive solder mass adjacent the other end projecting elevationally on the other side of the one substrate; individual of the solder masses being bonded t…
Assignees
Inventors
Classifications
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Patent family
Related publications grouped by family.
External sources
Next steps
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US9123700B2 cover?
- An integrated circuit construction includes a stack of two or more integrated circuit substrates. At least one of the substrates includes through substrate vias (TSVs) individually comprising opposing ends. A conductive bond pad is adjacent one of the ends on one side of the one substrate. A conductive solder mass is adjacent the other end projecting elevationally on the other side of the one s…
- Who is the assignee on this patent?
- Gandhi Jaspreet S, Wirz Brandon P, Sun Yangyang, and 2 more
- What technology area does this patent fall under?
- Primary CPC classification H10W20/20. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Sep 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).