User interface for display of still images corresponding to live video broadcasts
US-2015346927-A1 · Dec 3, 2015 · US
Video processing apparatus and method for simultaneously displaying a plurality of video signals on display device
US9113136B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9113136-B2 |
| Application number | US-201013810208-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 15, 2010 |
| Priority date | Jul 15, 2010 |
| Publication date | Aug 18, 2015 |
| Grant date | Aug 18, 2015 |
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Abstract
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A video processing apparatus includes decoding circuit, setting circuit, processing circuit, first buffer, second buffer, and display unit. The decoding circuit generates a plurality of decoded video signals. The setting circuit selects a main decoded video signal and at least one sub-decoded video signal from the decoded video signals. The processing circuit processes main decoded video signal and sub-decoded video signal(s) to generate a processed video signal. Each of these two buffers serves as on-screen buffer for storing the processed video signal being displayed or to be displayed and serves as on-process buffer for storing the processed video signal being mixed or to be mixed, cyclically. The first and second buffers do not serve as on-screen buffer simultaneously, and the first and second buffers do not serve as on-process buffer simultaneously. The display unit cyclically displays the processed video signal read from first buffer and second buffer.
First claim
Opening claim text (preview).
The invention claimed is: 1. A video processing apparatus, comprising: a decoding circuit, for decoding a plurality of video signals to generate a plurality of decoded video signals; a setting circuit, coupled to the decoding circuit, for selecting a main decoded video signal from the plurality of decoded video signals, and selecting at least one sub-decoded video signal from the other decoded video signals, wherein each of the main decoded video signal and the sub-decoded video…
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Classifications
- H04N21/4314Primary
Electricity · mapped topic
Electricity · mapped topic
- H04N19/00Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9113136B2 cover?
- A video processing apparatus includes decoding circuit, setting circuit, processing circuit, first buffer, second buffer, and display unit. The decoding circuit generates a plurality of decoded video signals. The setting circuit selects a main decoded video signal and at least one sub-decoded video signal from the decoded video signals. The processing circuit processes main decoded video signal…
- Who is the assignee on this patent?
- Hui Guangjun, Peng Deliang, Mediatek Singapore Pte Ltd
- What technology area does this patent fall under?
- Primary CPC classification H04N21/4314. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Aug 18 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).