Application programming interface to modify thread
US-2024289129-A1 · Aug 29, 2024 · US
Network interface and protocol
US9112752B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9112752-B2 |
| Application number | US-91039110-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 22, 2010 |
| Priority date | Sep 16, 2002 |
| Publication date | Aug 18, 2015 |
| Grant date | Aug 18, 2015 |
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- Title
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- Abstract
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Abstract
Official abstract text for this publication.
A communication interface for providing an interface between a data link and a data processor, the data processor being capable of supporting an operating system and a user application, the communication interface being arranged to: support a first queue of data received over the link and addressed to a logical data port associated with a user application; support a second queue of data received over the link and identified as being directed to the operating system; and analyze data received over the link and identified as being directed to the operating system or the data port to determine whether that data meets one or more predefined criteria, and if it does meet the criteria transmit an interrupt to the operating system.
First claim
Opening claim text (preview).
The invention claimed is: 1. An apparatus comprising: a communication interface for providing an interface between a data link and a data processor, the data processor being configured to support an operating system, a virtual address space and one or more logical data ports, the logical data ports existing within the operating system, the communication interface comprising at least one of a processor and circuitry to: apply first data received over the link and addressed to one…
Assignees
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Classifications
- G06F9/544Primary
Physics · mapped topic
Electricity · mapped topic
Physics · mapped topic
- H04L29/12009Primary
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9112752B2 cover?
- A communication interface for providing an interface between a data link and a data processor, the data processor being capable of supporting an operating system and a user application, the communication interface being arranged to: support a first queue of data received over the link and addressed to a logical data port associated with a user application; support a second queue of data receive…
- Who is the assignee on this patent?
- Pope Steve Leslie, Roberts Derek Edward, Riddoch David James, and 2 more
- What technology area does this patent fall under?
- Primary CPC classification G06F9/544. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Aug 18 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).