Power amplifier control circuits
US-8975961-B2 · Mar 10, 2015 · US
Variable gain low-noise amplifier
US9112472B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9112472-B2 |
| Application number | US-201314107463-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 16, 2013 |
| Priority date | Dec 16, 2013 |
| Publication date | Aug 18, 2015 |
| Grant date | Aug 18, 2015 |
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Abstract
Official abstract text for this publication.
A variable-gain low-noise amplifier (VG-LNA) accepts a single-ended input signal at an input port and provides a differential output signal at an output port. The VG-LNA includes amplifier stages that are commonly coupled to the input port, with subtrahend amplifier stages commonly coupled to a negative terminal of the output port and minuend amplifier stages commonly coupled to a positive terminal of the output port. A control circuit activates up to one of the subtrahend amplifier stages and one of the minuend amplifier stages as a differential set of amplifier stages that generates the differential output signal from the single-ended input signal.
First claim
Opening claim text (preview).
What is claimed is: 1. An amplifier comprising: an input port comprising a signal terminal and a common terminal between which a radio-frequency (RF) single-ended input signal is accepted; an output port comprising a positive terminal and a negative terminal between which an RF differential output signal is provided; a plurality of amplifier stages commonly coupled to the signal terminal of the input port, the amplifier stages including a plurality of subtrahend amplifier stag…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
- H03F1/26Primary
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9112472B2 cover?
- A variable-gain low-noise amplifier (VG-LNA) accepts a single-ended input signal at an input port and provides a differential output signal at an output port. The VG-LNA includes amplifier stages that are commonly coupled to the input port, with subtrahend amplifier stages commonly coupled to a negative terminal of the output port and minuend amplifier stages commonly coupled to a positive term…
- Who is the assignee on this patent?
- Mstar Semiconductor Inc
- What technology area does this patent fall under?
- Primary CPC classification H03F1/26. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Aug 18 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).