Self-aligned barrier and capping layers for interconnects

US9112005B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9112005-B2
Application numberUS-201313962856-A
CountryUS
Kind codeB2
Filing dateAug 8, 2013
Priority dateOct 23, 2009
Publication dateAug 18, 2015
Grant dateAug 18, 2015

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Abstract

Official abstract text for this publication.

An interconnect structure for integrated circuits for copper wires in integrated circuits and methods for making the same are provided. Mn, Cr, or V containing layer forms a barrier against copper diffusing out of the wires, thereby protecting the insulator from premature breakdown, and protecting transistors from degradation by copper. The Mn, Cr, or V containing layer also promotes strong adhesion between copper and insulators, thus preserving the mechanical integrity of the devices during manufacture and use, as well as protecting against failure by electromigration of the copper during use of the devices and protecting the copper from corrosion by oxygen or water from its surroundings. In forming such integrated circuits, certain embodiments of the invention provide methods to selectively deposit Mn, Cr, V, or Co on the copper surfaces while reducing or even preventing deposition of Mn, Cr, V, or Co on insulator surfaces. Catalytic deposition of copper using a Mn, Cr, or V containing precursor and an iodine or bromine containing precursor is also provided.

First claim

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We claim: 1. A process comprising: depositing a metal containing layer from a vapor of a metal containing precursor, wherein the metal is selected from the group consisting of manganese, chromium and vanadium; depositing an iodine or bromine containing material from a vapor of an iodine or bromine containing precursor, wherein the iodine or bromine containing material is chemisorbed on or in the metal containing layer; and depositing a copper containing material from a vapor o…

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What does patent US9112005B2 cover?
An interconnect structure for integrated circuits for copper wires in integrated circuits and methods for making the same are provided. Mn, Cr, or V containing layer forms a barrier against copper diffusing out of the wires, thereby protecting the insulator from premature breakdown, and protecting transistors from degradation by copper. The Mn, Cr, or V containing layer also promotes strong adh…
Who is the assignee on this patent?
Harvard College
What technology area does this patent fall under?
Primary CPC classification H10P14/43. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 18 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).