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US-2024243155-A1 · Jul 18, 2024 · US
Multi-level stack having multi-level contact and method
US9111998B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9111998-B2 |
| Application number | US-201213439087-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 4, 2012 |
| Priority date | Apr 4, 2012 |
| Publication date | Aug 18, 2015 |
| Grant date | Aug 18, 2015 |
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Abstract
Official abstract text for this publication.
A method for forming a multi-level stack having a multi-level contact is provided. The method includes forming a multi-level stack comprising a specified number, n, of conductive layers and at least n−1 insulating layers. A via formation layer is formed over the stack. A first via is etched in the via formation layer at a first edge of the stack. A first multi-level contact is formed in the first via. For a particular embodiment, a second via may be etched in the via formation layer at a second edge of the stack and a second multi-level contact may be formed in the second via.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for forming a multi-level stack having a multi-level contact, comprising: forming a multi-level stack comprising a specified number, n, of conductive layers and at least n−1 insulating layers, the stack having a plurality of outside edges; forming a via formation layer over the stack; etching a first via in the via formation layer at a first outside edge of the stack; etching a second via in the via formation layer at a second outside edge of…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
- H10W20/01Primary
Electricity · mapped topic
- H10W20/057Primary
Electricity · mapped topic
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- What does patent US9111998B2 cover?
- A method for forming a multi-level stack having a multi-level contact is provided. The method includes forming a multi-level stack comprising a specified number, n, of conductive layers and at least n−1 insulating layers. A via formation layer is formed over the stack. A first via is etched in the via formation layer at a first edge of the stack. A first multi-level contact is formed in the fir…
- Who is the assignee on this patent?
- Lao Keith, Samsung Electronics Co Ltd, Samsung Austin Semiconductor
- What technology area does this patent fall under?
- Primary CPC classification H10W20/01. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Aug 18 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).