Integrated semiconductor device and a bridge circuit with the integrated semiconductor device

Patent metadata

Field	Value
Publication number	US-9111764-B2
Application number	US-201213548266-A
Country	US
Kind code	B2
Filing date	Jul 13, 2012
Priority date	Jul 13, 2012
Publication date	Aug 18, 2015
Grant date	Aug 18, 2015

Abstract

A bridge circuit is provided. The bridge circuit includes a first integrated semiconductor device having a high-side switch, a second integrated semiconductor device having a low-side switch electrically connected with the high-side switch, a first level-shifter electrically connected with the high-side switch and integrated in one of the first integrated semiconductor device and the second integrated semiconductor device, and a second level-shifter electrically connected with the low-side switch and integrated in one of the first integrated semiconductor device and the second integrated semiconductor device. Further, an integrated semiconductor device is provided.

First claim

What is claimed is:

1. A bridge circuit, comprising:
a first integrated semiconductor device comprising a high-side switch;
a second integrated semiconductor device comprising a low-side switch electrically connected with the high-side switch;
a first level-shifter electrically connected with the high-side switch and integrated in one of the first integrated semiconductor device and the second integrated semiconductor device; and
a second level-shifter electrically connected with the low-side switch and integrated in one of the first integrated semiconductor device and the second integrated semiconductor device,
wherein the high-side switch and the low-side switch are electrically connected, the bridge circuit further comprising a first driver circuit electrically connected with a control terminal of the high-side switch and a second driver circuit electrically connected with a control terminal of the low-side switch,
wherein the first driver circuit is electrically connected with the second level-shifter via a first resistor.

2. The bridge circuit of claim 1 , wherein the first level-shifter comprises one of a pnp-transistor and a p-channel MOSFET.

3. The bridge circuit of claim 1 , wherein the second level-shifter comprises one of an npn-transistor and an n-channel MOSFET.

4. The bridge circuit of claim 1 , wherein the high-side switch is a power MOSFET comprising a gate electrode electrically connected with the first level-shifter.

5. The bridge circuit of claim 1 , wherein the low-side switch is a MOSFET comprising a gate electrode electrically connected with the second level-shifter.

6. The bridge circuit of claim 1 , wherein the first level-shifter and the second level-shifter are both integrated in the same one of the first integrated semiconductor device and the second integrated semiconductor device.

7. The bridge circuit of claim 1 , wherein the first integrated semiconductor device comprises a first semiconductor body comprising a first surface defining a vertical direction, an opposite surface, and a first conductive via extending between the first surface and the opposite surface, and wherein the first integrated semiconductor device further comprises a common metallization arranged on the opposite surface forming at least a load terminal of the high-side switch and being in low resistive contact with the first conductive via.

8. The bridge circuit of claim 1 , wherein the second integrated semiconductor device comprises a semiconductor body comprising a first surface defining a vertical direction, an opposite surface, and a first conductive via extending between the first surface and the opposite surface, and wherein the second integrated semiconductor device further comprises a common metallization arranged on the opposite surface, forms a load terminal of the low-side switch and the second level-shifter and is in low resistive contact with the first conductive via.

9. The bridge circuit of claim 1 , wherein at least one of the first integrated semiconductor device and the second integrated semiconductor device comprises a semiconductor body comprising a first surface defining a vertical direction, an opposite surface, a control terminal arranged on the first surface and a conductive via in low resistive contact with the control terminal and extending between the first surface and the opposite surface.

10. The bridge circuit of claim 1 , wherein the bridge circuit is a half-bridge circuit.

11. The bridge circuit of claim 1 , wherein the second driver circuit is electrically connected with the first level-shifter via a second resistor.

12. The bridge circuit of claim 1 , wherein at least one of the first level-shifter and the second level-shifter is configured to convert a dc voltage level to another dc voltage level by a factor of at least about five.

13. A bridge circuit, comprising:
a first integrated semiconductor device comprising a high-side switch;
a second integrated semiconductor device comprising a low-side switch electrically connected with the high-side switch;
a first level-shifter electrically connected with the high-side switch and integrated in one of the first integrated semiconductor device and the second integrated semiconductor device; and
a second level-shifter electrically connected with the low-side switch and integrated in one of the first integrated semiconductor device and the second integrated semiconductor device,
wherein the high-side switch and the low-side switch are electrically connected, the bridge circuit further comprising a first driver circuit electrically connected with a control terminal of the high-side switch and a second driver circuit electrically connected with a control terminal of the low-side switch,
wherein the second driver circuit is electrically connected with the first level-shifter via a resistor.

14. A bridge circuit, comprising:
a first integrated semiconductor device comprising a high-side switch;
a second integrated semiconductor device comprising a low-side switch electrically connected with the high-side switch;
a first level-shifter electrically connected with the high-side switch and integrated in one of the first integrated semiconductor device and the second integrated semiconductor device; and
a second level-shifter electrically connected with the low-side switch and integrated in one of the first integrated semiconductor device and the second integrated semiconductor device,
wherein the high-side switch and the low-side switch are electrically connected, the bridge circuit further comprising at least one of a first driver circuit electrically connected with a control terminal of the high-side switch and a second driver circuit electrically connected with a control terminal of the low-side switch,
wherein at least one of the first level-shifter and the second level-shifter is configured to convert a dc voltage level to another dc voltage level by a factor of at least about five.

Assignees

• Hirler Franz
• Meiser Andreas
• Thiele Steffen
• Infineon Technologies Ag

Inventors

• Hirler Franz
• Meiser Andreas
• Thiele Steffen

Classifications

• H10W20/43

  Layouts of interconnections · CPC title

• H10W20/20

  Interconnections within wafers or substrates, e.g. through-silicon vias [TSV] · CPC title

• H10D64/111

  Field plates · CPC title

• H10D62/111

  Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures · CPC title

• H10D30/668

  having trench gate electrodes, e.g. UMOS transistors · CPC title