Load drive circuit, light emitting diode driver, and display device
US-2024397595-A1 · Nov 28, 2024 · US
Display apparatus that generates black image signal in synchronization with the driver IC whose internal clock has the highest frequency when image/timing signals are not received
US9111509B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9111509-B2 |
| Application number | US-201213548946-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 13, 2012 |
| Priority date | Jul 14, 2011 |
| Publication date | Aug 18, 2015 |
| Grant date | Aug 18, 2015 |
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Abstract
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A flat panel display is provided. In particular, a flat panel display including a driving circuit in which a timing controller and a data driver for driving a panel are mounted in a single IC, and a driving circuit thereof are provided. The flat panel display includes a display panel having a plurality of pixels, a gate driver controlling the plurality of pixels, and a plurality of driving circuits processing and converting an image signal and outputting the same to a display panel in a normal mode. The driving circuits generate a black image signal according to a synchronization signal.
First claim
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What is claimed is: 1. A flat panel display (FPD) device comprising: a display panel having a plurality of pixels; a gate driver controlling the plurality of pixels; and a plurality of driving circuits processing and converting an image signal for outputting to the display panel in a normal mode when timing signals and the image signal are received from an external system, and generating a black image signal according to a synchronization signal when the timing signals or the…
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Physics · mapped topic
- G09G3/3688Primary
Physics · mapped topic
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- What does patent US9111509B2 cover?
- A flat panel display is provided. In particular, a flat panel display including a driving circuit in which a timing controller and a data driver for driving a panel are mounted in a single IC, and a driving circuit thereof are provided. The flat panel display includes a display panel having a plurality of pixels, a gate driver controlling the plurality of pixels, and a plurality of driving circ…
- Who is the assignee on this patent?
- Kim Minki, Ha Sungchul, Kim Jinsung, and 1 more
- What technology area does this patent fall under?
- Primary CPC classification G09G3/3688. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Aug 18 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).