Eliminating common mode noise in otuch applications

Patent metadata

Field	Value
Publication number	US-9110552-B2
Application number	US-201313912028-A
Country	US
Kind code	B2
Filing date	Jun 6, 2013
Priority date	Mar 11, 2013
Publication date	Aug 18, 2015
Grant date	Aug 18, 2015

Abstract

A processing device scans, during a first operation, a first plurality of electrodes along a first axis in a capacitive sense array to generate a first plurality of signals corresponding to a mutual capacitance at electrode intersections of the capacitive sense array. During a second operation, the processing device scans a second plurality of electrodes along a second axis in the capacitive sense array to generate a second plurality of signals corresponding to the mutual capacitance at the electrode intersections of the capacitive sense array, wherein the second operation occurs during a different period of time than the first operation. The processing device determines a first coordinate of a conductive object proximate to the capacitive sense array based on the first plurality of signals and a second coordinate of the conductive object based on the second plurality of signals.

First claim

What is claimed:

1. A method comprising:
scanning, during a first operation, a first plurality of electrodes along a first axis in a capacitive sense array to generate a first plurality of signals corresponding to a mutual capacitance at electrode intersections of the capacitive sense array, the first plurality of signals to identify a first coordinate of a conductive object proximate to the capacitive sense array;
scanning, during a second operation, a second plurality of elect…

Assignees

• Cypress Semiconductor Corp

Inventors

• Maharyta Andriy
• Karpin Oleksandr
• Boychuk Yuriy
• Ribeiro Milton

Classifications

• G06F3/044 Primary

  Physics · mapped topic

• G06F3/0446

  Physics · mapped topic

• G06F3/04184

  Physics · mapped topic

• G06F3/04182 Primary

  Physics · mapped topic