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US-2024431161-A1 · Dec 26, 2024 · US
US9106877B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9106877-B2 |
| Application number | US-201213545909-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 10, 2012 |
| Priority date | Jul 23, 2007 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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A video signal processing apparatus (and method) includes a section determination unit which detects a non-equidistant section having different intervals between a plurality of sample points set for a range from a minimum signal level to a maximum signal level of a video signal to be inputted, correction level holding unit which holds a signal level of a video signal after correction for each sample point as a correction level, and an interpolation computation unit which obtains a signal level of the video signal after correction corresponding to the signal level of the inputted video signal by executing cubic interpolation computation with reference to the correction level held by the correction level holding unit.
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What is claimed is: 1. A video signal processing apparatus, comprising: a non-equidistant section determination circuit which is configured to detect a non-equidistant section having different intervals between a plurality of sample points set for a range from a minimum signal level to a maximum signal level of a video signal to be inputted; a sample data register which is configured to hold a signal level of a video signal after correction for each sample point as a correction…
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