Multi-tuner using interpolative dividers

Patent metadata

Field	Value
Publication number	US-9106867-B2
Application number	US-201414505701-A
Country	US
Kind code	B2
Filing date	Oct 3, 2014
Priority date	Mar 13, 2013
Publication date	Aug 11, 2015
Grant date	Aug 11, 2015

Abstract

An apparatus includes a splitter to receive a radio frequency (RF) signal and to provide the RF signal to multiple channels of a tuner. Each channel may include an amplifier to amplify the RF signal, a mixer to downconvert the amplified RF signal to a second frequency signal using a local oscillator (LO) signal, where each of the channels is configured to receive a different LO signal, a filter to filter the downconverted second frequency signal, and a digitizer to digitize the downconverted second frequency signal. A clock generation circuit has multiple interpolative dividers and a frequency synthesizer to generate a reference clock signal. Each of the interpolative dividers is configured to receive the reference clock signal, generate a corresponding LO signal, and provide the corresponding LO signal to the mixer of at least one of the channels.

First claim

What is claimed is:

1. An apparatus comprising:
a plurality of channels for receiving a radio frequency (RF) signal, wherein each of the plurality of channels comprises:
a first amplifier to amplify the RF signal;
a mixer to downconvert the amplified RF signal to a second frequency signal using a local oscillator (LO) signal, each of the plurality of channels configured to receive a different LO signal;
a first filter to filter the downconverted second frequency signal;
a d…

Assignees

• Silicon Lab Inc

Inventors

• Koroglu Mustafa H
• Coban Abdulkerim L

Classifications

• H04N5/50

  Electricity · mapped topic

• H04N5/455 Primary

  Electricity · mapped topic

• H04N21/4382

  Electricity · mapped topic

• H04N21/4263

  Electricity · mapped topic

• H04N5/4401 Primary

  Electricity · mapped topic