Solid-state image pickup device with plurality of converters

US9106859B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9106859-B2
Application numberUS-201213661724-A
CountryUS
Kind codeB2
Filing dateOct 26, 2012
Priority dateNov 4, 2011
Publication dateAug 11, 2015
Grant dateAug 11, 2015

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Abstract

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A solid-state image pickup device includes a column ADC realizing higher precision and higher-speed conversion. Converters converts a signal of each pixels output via a corresponding vertical read line to a digital value by sequentially executing first to N-th (N: integer of three or larger) conversion stages. In the first to (N−1)th conversion stages, each converter determines a value of upper bits including the most significant bit of a digital value by comparing the voltage at a retention stage with a reference voltage while changing the voltage at a retention node. In the N-th conversion stage, each converter determines a value of remaining bits to the least significant bit by comparing the voltage at the retention node with the reference voltage while continuously changing the voltage at the retention node in a range of the voltage step in the (N−1)th conversion stage or a range exceeding the range.

First claim

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What is claimed is: 1. A solid-state image pickup device comprising: an imaging unit in which a plurality of pixels each including a photoelectric conversion element for converting a light signal to an electric signal are disposed in a matrix, and signals of pixels in a selected row are output via a plurality of vertical read lines disposed for columns while sequentially scanning the pixels row by row; and a plurality of converters provided in correspondence with the vertical re…

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What does patent US9106859B2 cover?
A solid-state image pickup device includes a column ADC realizing higher precision and higher-speed conversion. Converters converts a signal of each pixels output via a corresponding vertical read line to a digital value by sequentially executing first to N-th (N: integer of three or larger) conversion stages. In the first to (N−1)th conversion stages, each converter determines a value of upper…
Who is the assignee on this patent?
Renesas Electronics Corp
What technology area does this patent fall under?
Primary CPC classification H04N25/78. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).