Protected data accesses using remote copy operations
US-2024111879-A1 · Apr 4, 2024 · US
Two parallel engines for high speed transmit IPSEC processing
US9106625B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9106625-B2 |
| Application number | US-62508609-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 24, 2009 |
| Priority date | Mar 2, 2004 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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- Title
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- Abstract
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- First independent claim
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Abstract
Official abstract text for this publication.
The invention relates to a network interface system for interfacing a host system with a network. The network interface system includes a bus interface system, a media access control system, and a security system. The network interface offloads IPsec processing from the host processor. According to the invention, the security system includes two processors for encrypting and authenticating the outgoing data. Outgoing data packets are sent alternately to one or the other processor, whereby transmission processing can be accelerated relative to receive processing.
First claim
Opening claim text (preview).
What is claimed is: 1. A single integrated circuit, comprising: a memory system configured to store incoming and outgoing data packets being transferred between a network and a host system; a security system adapted to perform transmit IPsec processing on data packets for transmission to a network, wherein the security system comprises two processors in parallel for performing the transmit IPsec processing to generate encrypted data packets; two output buffers, each output buf…
Assignees
Inventors
Classifications
- H04L63/0485Primary
Electricity · mapped topic
Electricity · mapped topic
- H04L63/0428Primary
Electricity · mapped topic
Physics · mapped topic
- G06F13/00Primary
Physics · mapped topic
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Frequently asked questions
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- What does patent US9106625B2 cover?
- The invention relates to a network interface system for interfacing a host system with a network. The network interface system includes a bus interface system, a media access control system, and a security system. The network interface offloads IPsec processing from the host processor. According to the invention, the security system includes two processors for encrypting and authenticating the …
- Who is the assignee on this patent?
- Kaniz Marufa, Dwork Jeffrey, Williams Robert Alan, and 3 more
- What technology area does this patent fall under?
- Primary CPC classification H04L63/0485. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).