Enhanced physical structure for lte v2v communications
US-2024340204-A1 · Oct 10, 2024 · US
US9106494B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9106494-B2 |
| Application number | US-201414487963-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 16, 2014 |
| Priority date | Mar 25, 2003 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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A data processing apparatus maps input symbols to be communicated onto a predetermined number of sub-carrier signals of an Orthogonal Frequency Division Multiplexed (OFDM) symbol. The data processor includes an interleaver memory which reads-in the predetermined number of data symbols for mapping onto the OFDM sub-carrier signals. The interleaver memory reads-out the data symbols on to the OFDM sub-carriers to effect the mapping, the read-out being in a different order than the read-in, the order being determined from a set of addresses, with the effect that the data symbols are interleaved on to the sub-carrier signals. The set of addresses are generated from an address generator which comprises a linear feedback shift register and a permutation circuit.
Opening claim text (preview).
The invention claimed is: 1. A data processing apparatus configured to map input symbols to be communicated onto a predetermined number of sub-carrier signals of an Orthogonal Frequency Division Multiplexed (OFDM) symbol, the data processing apparatus comprising: an interleaver configured to read-into a memory the predetermined number of data symbols for mapping onto the OFDM sub-carrier signals, and to read-out of the memory the data symbols for the OFDM sub-carriers to effect th…
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