Methods of patterning features having differing widths
US-9214360-B2 · Dec 15, 2015 · US
Semiconductor device and manufacturing method thereof
US9105739B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9105739-B2 |
| Application number | US-201313783268-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 2, 2013 |
| Priority date | Mar 13, 2012 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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Abstract
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A semiconductor device with a nonvolatile memory is provided which has improved electric performance. A memory gate electrode is formed over a semiconductor substrate via an insulating film. The insulating film is an insulating film having a charge storage portion therein, and includes a first silicon oxide film, a silicon nitride film over the first silicon oxide film, and a second silicon oxide film over the silicon nitride film. Metal elements exist between the silicon nitride film and the second silicon oxide film, or in the silicon nitride film at a surface density of 1×10 13 to 2×10 14 atoms/cm 2 .
First claim
Opening claim text (preview).
What is claimed is: 1. A semiconductor device, comprising: a semiconductor substrate; a first gate electrode and a second gate electrode formed over the semiconductor substrate; and a first insulating film formed between the first gate electrode and the semiconductor substrate, and between the first gate electrode and the second gate electrode, the first insulating film including therein a charge storage portion, wherein the first insulating film includes a first silicon oxi…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US9105739B2 cover?
- A semiconductor device with a nonvolatile memory is provided which has improved electric performance. A memory gate electrode is formed over a semiconductor substrate via an insulating film. The insulating film is an insulating film having a charge storage portion therein, and includes a first silicon oxide film, a silicon nitride film over the first silicon oxide film, and a second silicon oxi…
- Who is the assignee on this patent?
- Renesas Electronics Corp
- What technology area does this patent fall under?
- Primary CPC classification H10D64/01334. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).