Semiconductor constructions

Patent metadata

Field	Value
Publication number	US-9105737-B2
Application number	US-201313735908-A
Country	US
Kind code	B2
Filing date	Jan 7, 2013
Priority date	Jan 7, 2013
Publication date	Aug 11, 2015
Grant date	Aug 11, 2015

Abstract

Some embodiments include methods of forming vertical memory strings. A trench is formed to extend through a stack of alternating electrically conductive levels and electrically insulative levels. An electrically insulative panel is formed within the trench. Some sections of the panel are removed to form openings. Each opening has a first pair of opposing sides along the stack, and has a second pair of opposing sides along remaining sections of the panel. Cavities are formed to extend into the electrically conductive levels along the first pair of opposing sides of the openings. Charge blocking material and charge-storage material is formed within the cavities. Channel material is formed within the openings and is spaced from the charge-storage material by gate dielectric material. Some embodiments include semiconductor constructions, and some embodiments include methods of forming vertically-stacked structures.

First claim

I claim:

1. A semiconductor construction, comprising:
an etchstop material over a semiconductor base;
a stack of alternating electrically conductive levels and electrically insulative levels over the etchstop material;
electrically insulative pillars extending through the stack and contacting an upper surface of the etchstop material;
channel material posts between the pillars; the channel material posts extending through the etchstop material and having a first pair of oppo…

Assignees

• Micron Technology Inc

Inventors

• Hopkins John D

Classifications

• H10P14/69433

  Electricity · mapped topic

• H10P14/69215

  Electricity · mapped topic

• H10D64/681

  Electricity · mapped topic

• H10D64/037

  Electricity · mapped topic

• H10D64/035

  Electricity · mapped topic