Transistor and display device

US9105735B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9105735-B2
Application numberUS-201414217887-A
CountryUS
Kind codeB2
Filing dateMar 18, 2014
Priority dateSep 4, 2009
Publication dateAug 11, 2015
Grant dateAug 11, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

It is an object to manufacture a highly reliable display device using a thin film transistor having favorable electric characteristics and high reliability as a switching element. In a bottom gate thin film transistor including an amorphous oxide semiconductor, an oxide conductive layer having a crystal region is formed between an oxide semiconductor layer which has been dehydrated or dehydrogenated by heat treatment and each of a source electrode layer and a drain electrode layer which are formed using a metal material. Accordingly, contact resistance between the oxide semiconductor layer and each of the source electrode layer and the drain electrode layer can be reduced; thus, a thin film transistor having favorable electric characteristics and a highly reliable display device using the thin film transistor can be provided.

First claim

Opening claim text (preview).

The invention claimed is: 1. A semiconductor device comprising: a gate electrode; a gate insulating layer over the gate electrode; an oxide semiconductor layer over the gate insulating layer; an oxide insulating layer over the oxide semiconductor layer; a source electrode layer over the oxide semiconductor layer and the oxide insulating layer; a drain electrode layer over the oxide semiconductor layer and the oxide insulating layer; and an insulating layer over the oxi…

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What does patent US9105735B2 cover?
It is an object to manufacture a highly reliable display device using a thin film transistor having favorable electric characteristics and high reliability as a switching element. In a bottom gate thin film transistor including an amorphous oxide semiconductor, an oxide conductive layer having a crystal region is formed between an oxide semiconductor layer which has been dehydrated or dehydroge…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H10D86/423. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).