Semiconductor device

US9105732B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9105732-B2
Application numberUS-201414483671-A
CountryUS
Kind codeB2
Filing dateSep 11, 2014
Priority dateSep 16, 2011
Publication dateAug 11, 2015
Grant dateAug 11, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

To provide a transistor which includes an oxide semiconductor and is capable of operating at high speed or a highly reliable semiconductor device including the transistor, a transistor in which an oxide semiconductor layer including a pair of low-resistance regions and a channel formation region is provided over an electrode layer, which is embedded in a base insulating layer and whose upper surface is at least partly exposed from the base insulating layer, and a wiring layer provided above the oxide semiconductor layer is electrically connected to the electrode layer or a part of a low-resistance region of the oxide semiconductor layer, which overlaps with the electrode layer.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for manufacturing a semiconductor device comprising the steps of: forming a conductive layer embedded in a first insulating layer; forming an oxide semiconductor layer over and in contact with the conductive layer and the first insulating layer; forming a gate insulating layer over the oxide semiconductor layer; forming a gate electrode over the gate insulating layer; adding a dopant to the oxide semiconductor layer using the gate elec…

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What does patent US9105732B2 cover?
To provide a transistor which includes an oxide semiconductor and is capable of operating at high speed or a highly reliable semiconductor device including the transistor, a transistor in which an oxide semiconductor layer including a pair of low-resistance regions and a channel formation region is provided over an electrode layer, which is embedded in a base insulating layer and whose upper su…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H10D30/6755. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).