Semiconductor device
US-12057459-B2 · Aug 6, 2024 · US
US9105728B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9105728-B2 |
| Application number | US-201213557039-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 24, 2012 |
| Priority date | Jul 24, 2012 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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This disclosure provides implementations of multi-gate transistors, structures, devices, apparatus, systems, and related processes. In one aspect, a device includes a thin-film semiconducting layer arranged over a substrate. A drain and source are coupled to the semiconducting layer. The device also includes first, second and third gates all arranged adjacent the semiconducting layer and configured to receive first, second, and third control signals, respectively. Dielectric layers insulate the gates from the semiconducting layer and from one another. In a first mode, the first, second, and third gates are configured such that charge is stored in a potential well in a region of the semiconducting layer adjacent the second gate. In a second mode, the first, second and third gate electrodes are configured such that the stored charge is transferred through the region of the semiconducting layer adjacent the third gate electrode and through the source to a load.
Opening claim text (preview).
What is claimed is: 1. A device comprising: a substrate; a thin-film semiconducting layer over the substrate; a drain coupled to the semiconducting layer and capable of receiving an input signal; a source coupled to the semiconducting layer and capable of providing an output signal; a first gate electrode adjacent a first portion of the semiconducting layer between the drain and the source, the first gate electrode capable of receiving a first control signal, the first gat…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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