Power mosfet and manufacturing method thereof
US-2024322032-A1 · Sep 26, 2024 · US
Semiconductor device
US9105716B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9105716-B2 |
| Application number | US-94463210-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 11, 2010 |
| Priority date | Dec 10, 2007 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
A semiconductor device includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type provided on a main surface of the first semiconductor layer and having a lower impurity concentration than that of the first semiconductor layer; a third semiconductor layer of a second conductivity type provided on the second semiconductor layer; a fourth semiconductor layer of the first conductivity type selectively provided on the third semiconductor layer; a gate electrode provided in a trench passing through the third semiconductor layer and reaching the second semiconductor layer; a first main electrode contacting the fourth semiconductor layer and contacting the third semiconductor layer through a contact groove provided to pass through the fourth semiconductor layer between the contiguous gate electrodes; a second main electrode provided on an opposite surface to the main surface of the first semiconductor layer; and a fifth semiconductor layer of the second conductivity type provided in an interior portion of the second semiconductor layer corresponding to a part under the contact groove. An uppermost portion of the fifth semiconductor layer contacts the third semiconductor layer, a lowermost portion of the fifth semiconductor layer has a higher impurity concentration than that of the other portion in the fifth semiconductor layer and is located in the second semiconductor layer and not contacting the first semiconductor layer, and the fifth semiconductor layer is narrower from the uppermost portion to the lower most portion.
First claim
Opening claim text (preview).
The invention claimed is: 1. A method for producing a semiconductor device, comprising: forming a first trench gate structure and a second trench gate structure in a plurality of semiconductor layers including a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type on the first semiconductor layer, a third semiconductor layer of a second conductivity type on the second semiconductor layer, and a fourth semiconductor lay…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9105716B2 cover?
- A semiconductor device includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type provided on a main surface of the first semiconductor layer and having a lower impurity concentration than that of the first semiconductor layer; a third semiconductor layer of a second conductivity type provided on the second semiconductor layer…
- Who is the assignee on this patent?
- Akiyama Miwako, Kawaguchi Yusuke, Yamaguchi Yoshihiro, and 1 more
- What technology area does this patent fall under?
- Primary CPC classification H10D30/668. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).