Device structure and methods of forming the same
US-2024371920-A1 · Nov 7, 2024 · US
US9105698B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9105698-B2 |
| Application number | US-201414304111-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 13, 2014 |
| Priority date | Apr 27, 2010 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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A multilevel interconnect structure for a semiconductor device includes an intermetal dielectric layer with funnel-shaped connecting vias. The funnel-shaped connecting vias are provided in connection with systems exhibiting submicron spacings. The architecture of the multilevel interconnect structure provides a low resistance connecting via.
Opening claim text (preview).
What is claimed is: 1. A method for fabricating a multilevel interconnect structure with a first conducting level and a second conducting level, comprising: depositing a first dielectric layer over the first conducting level; depositing an intermediate dielectric layer on the first dielectric layer; performing chemical mechanical polishing after depositing the intermediate dielectric layer, wherein the chemical mechanical polishing ends below an upper level of the first dielec…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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