Manufacturing method for semiconductor structure
US-12165910-B2 · Dec 10, 2024 · US
US9105685B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9105685-B2 |
| Application number | US-201313941208-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 12, 2013 |
| Priority date | Jul 12, 2013 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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A method of forming a shallow trench isolation structure is disclosed. Hard mask patterns are formed on a substrate. A portion of the substrate is removed, using the hard mask patterns as a mask, to form first trenches in the substrate, wherein a fin is disposed between the neighboring first trenches. A filling layer is formed in the first trenches. A patterned mask layer is formed on the filling layer. A portion of the filling layer and a portion of the fins are removed, using the patterned mask layer as a mask, to form second trenches in the substrate. A first insulating layer is formed on the substrate filling in the second trenches.
Opening claim text (preview).
What is claimed is: 1. A method of forming a shallow trench isolation structure, comprising: forming a plurality of hard mask patterns on a substrate; removing a portion of the substrate by using the hard mask patterns as a mask, so as to form a plurality of first trenches in the substrate, wherein a fin is disposed between the neighboring first trenches; forming a filling layer in the first trenches; forming a patterned mask layer on the filling layer; removing a portion…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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