Transistor contacts and methods of forming the same
US-2024395871-A1 · Nov 28, 2024 · US
Fin-FET and method of forming the same
US9105660B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9105660-B2 |
| Application number | US-201113211334-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 17, 2011 |
| Priority date | Aug 17, 2011 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
How to read this patent
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
- Title
What the patent document calls the invention.
- Abstract
A short plain-language summary of the technical disclosure.
- Assignees and inventors
Who owns or filed the patent and who is credited as inventor.
- Key dates
Filing, priority, publication, and grant dates set the timeline.
- First independent claim
The legal scope of protection — read this for what is actually claimed.
- CPC / IPC classifications
Technology tags used to group this patent with similar filings.
- Citations and related patents
Prior art links and similar publications in this corpus.
Abstract
Official abstract text for this publication.
A method of forming a Fin-FET is provided. A substrate is provided, then a mask layer is formed thereabove. A first trench is formed in the substrate and the mask layer. A semiconductor layer is formed in the first trench. Next, the mask layer is removed such that the semi-conductive layer becomes a fin structure embedded in the substrate and protruded above the substrate. Finally, a gate layer is formed on the fin structure.
First claim
Opening claim text (preview).
What is claimed is: 1. A method of forming a Fin-FET, comprising: providing a substrate; forming a mask layer on the substrate; forming a first trench having an acute angle less than 30 degrees in the mask layer and the substrate; forming a semiconductor layer in the first trench; completely removing the mask layer such that the semiconductor layer becomes a fin structure embedded in the substrate and protruding from the substrate; and forming a gate layer on the fin str…
Assignees
Inventors
Classifications
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Patent family
Related publications grouped by family.
External sources
Next steps
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US9105660B2 cover?
- A method of forming a Fin-FET is provided. A substrate is provided, then a mask layer is formed thereabove. A first trench is formed in the substrate and the mask layer. A semiconductor layer is formed in the first trench. Next, the mask layer is removed such that the semi-conductive layer becomes a fin structure embedded in the substrate and protruded above the substrate. Finally, a gate layer…
- Who is the assignee on this patent?
- Tsai Chen-Hua, Huang Rai-Min, Dai Sheng-Huei, and 2 more
- What technology area does this patent fall under?
- Primary CPC classification H10D30/024. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).