Stubby pads for channel cross-talk reduction

US9105635B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9105635-B2
Application numberUS-201313801998-A
CountryUS
Kind codeB2
Filing dateMar 13, 2013
Priority dateMar 13, 2013
Publication dateAug 11, 2015
Grant dateAug 11, 2015

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Abstract

Official abstract text for this publication.

A metal surface feature, such as a pad, terminating a vertical transition through a substrate, such as an IC package substrate, includes one or more stubs providing high edge surface area to couple with one or more complementary stubs on an adjacent metal surface feature to provide a desired amount of mutual capacitance that may at least partially cancel crosstalk for an overall channel crosstalk (e.g., FEXT) reduction. In embodiments, capacitive coupling of adjacent pads is provided for more than two pads to achieve crosstalk reduction of more than one victim-aggressor pair and/or to achieve crosstalk reduction of more than two aggressors. In embodiments, the pads have a large pitch (e.g., 1000 μm) suitable for interfacing to an interposer or PCB socket, while the gap between the stubs is small (e.g., 15 μm), as limited only by the minimum spacing allowed for metal features on the opposite side of the package employed for interfacing to the IC.

First claim

Opening claim text (preview).

What is claimed is: 1. An integrated circuit (IC) package substrate, comprising: a first conductive vertical transition passing through a thickness of the substrate beginning at a first top-side metal feature on a first substrate side and ending at a first bottom-side metal feature on a second substrate side, opposite the first side, wherein the first bottom-side metal feature is a first signal I/O channel pad; and a second conductive vertical transition passing through the subs…

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What does patent US9105635B2 cover?
A metal surface feature, such as a pad, terminating a vertical transition through a substrate, such as an IC package substrate, includes one or more stubs providing high edge surface area to couple with one or more complementary stubs on an adjacent metal surface feature to provide a desired amount of mutual capacitance that may at least partially cancel crosstalk for an overall channel crossta…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification H10W70/685. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).