HBT cascode cell

Patent metadata

Field	Value
Publication number	US-9105604-B2
Application number	US-201414148429-A
Country	US
Kind code	B2
Filing date	Jan 6, 2014
Priority date	Jun 18, 2013
Publication date	Aug 11, 2015
Grant date	Aug 11, 2015

Abstract

A cascode gain stage apparatus includes a common-emitter connected transistor having a first base metal contact, first emitter metal contact, a first collector metal contact and a u-shaped first collector interface metal; and a common-base connected transistor having a second emitter metal contact, a second base metal contact, and a second collector metal contact, the second emitter metal contact in communication with the first collector metal contact through a transistor interconnect metallic strap, the second emitter metal contact disposed between the first collector metal contact and the second base metal contact. With this configuration, the first collector metal contact and second emitter metal contact are connected by the transistor interconnect metallic strap without high-aspect ratio traces to reduce crossover coupling.

First claim

What is claimed is:

1. A cascode gain stage apparatus, comprising:
a common-emitter connected transistor having a first base metal contact, first emitter metal contact, a first collector metal contact; and
a common-base connected transistor having a second emitter metal contact, a second base metal contact, and a second collector metal contact, the second emitter metal contact in communication with the first collector metal contact through a transistor interconnect metallic strap, the second emitter metal contact disposed between the first collector metal contact and the second base metal contact;
wherein the first collector metal contact and second emitter metal contact are connected by the transistor interconnect metallic strap.

2. The apparatus of claim 1 , further comprising:
a u-shaped second collector interface metal connected to the second collector metal contact, the u-shaped second collector interface metal having first and second collector arms; and
a second emitter strip bisecting the first and second collector arms, the second emitter strip in communication with the second emitter metal contact.

3. The apparatus of claim 2 , further comprising:
a slotted base intra-connect metallic strap in communication with the second base metal contact, the slotted base intra-connect metallic strap having a first cutout disposed above the first collector arm;
wherein the first cutout reduces collector-base coupling in the common-base connected transistor.

4. The apparatus of claim 3 , wherein the slotted base intra-connect metallic strap further comprises a second cutout disposed above the second collector arm.

5. The apparatus of claim 3 , wherein the slotted base intra-connect metallic strap and transistor interconnect metallic strap are formed from a single metal layer.

6. The apparatus of claim 1 , wherein the second emitter metal contact is configured in a fin in communication with the transistor interconnect metallic strap.

7. The apparatus of claim 1 , further comprising:
a first emitter intra-connect metallic strap in communication with the first emitter metal contact.

8. The apparatus of claim 1 , wherein the first emitter metal contact is configured in a fin.

9. The apparatus of claim 1 , further comprising:
a u-shaped first collector interface metal having first and second collector arms;
a first emitter strip bisecting the first and second collector arms, the first emitter strip in communication with the first emitter metal contact.

10. An array of cascode gain stages, comprising:
a plurality of a common-emitter connected transistors each having a first base metal contact, first emitter metal contact and a first collector metal contact; and
a plurality of common-base connected transistors each comprising:
a second emitter metal contact,
a second base metal contact,
a second collector metal contact; and
a u-shaped second collector interface metal connected to the second collector metal contact, the u-shaped second collector interface metal having a plurality of collector arms;

a plurality of transistor interconnect metallic straps electrically coupled between each of the plurality of second emitter metal contacts and each of the plurality of first collector metal contacts, each of the plurality of second emitter metal contacts disposed between each of the plurality of first collector metal contacts and each of the plurality of second base metal contacts,
a slotted base intra-connect metallic strap in communication with each of the plurality of second base metal contacts, the slotted base intra-connect metallic strap having a plurality of cutouts with each respective cutout disposed above a respective collector arm in each of the plurality of common-base connected transistors;
wherein each cutout reduces collector-base coupling and base inductance and each of the plurality of first collector metal contacts and each of the plurality of second emitter metal contacts are connected by each of the plurality of transistor interconnect metallic straps.

11. The array of claim 10 , further comprising:
a second collector intra-connect metallic strap in communication with each second collector metal contact in the plurality of common-base connected transistors.

12. The array of claim 10 , further comprising:
a first base intra-connect metallic strap in communication with each first base metal contact in the plurality of common-emitter connected transistors.

13. The array of claim 10 , further comprising:
a first emitter intra-connect metallic strap in communication with each first emitter metal contact in the plurality of common-emitter connected transistors.

14. The array of claim 10 , wherein the plurality of cutouts are first and second cutouts disposed over first and second arms, respectively, for each of the plurality of common-base connected transistors.

15. A transistor, comprising:
a base metal contact on a substrate;
a collector metal contact disposed on a u-shaped first collector interface metal, the u-shaped first collector interface metal having first and second collector arms on the substrate;
an emitter metal contact configured in a fin extending from an emitter strip in the substrate; and
a slotted base intra-connect metallic strap disposed on the base metal contact, the slotted base intra-connect metallic strap having a first and second cutout disposed above the first and second collector arms of the u-shaped first collector interface metal.

16. The transistor of claim 15 , further comprising:
an emitter transistor intra-connect metallic strap in communication with the emitter metal contact.

17. The transistor of claim 15 , wherein the emitter metal contact and the base metal contact bisect the first and second collector arms.

18. The transistor of claim 15 , further comprising a transistor interconnect metallic strap in communication with the emitter metal contact.

19. The transistor of claim 18 , wherein the transistor interconnect metallic strap and the slotted base intra-connect metallic strap are configured from a single metal layer.

20. The transistor of claim 15 , wherein the base metal contact is disposed between the emitter metal contact and the collector metal contact.

Assignees

• Teledyne Scient & Imaging Llc

Inventors

• Hacker Jonathan B

Classifications

• H10W72/647

  Dispositions of multiple strap connectors · CPC title

• H10W90/763

  between laterally-adjacent chips · CPC title

• H10W72/652

  comprising metals or metalloids, e.g. silver · CPC title

• H10W20/496

  Capacitor integral with wiring layers · CPC title

• H10W20/484 Primary

  Interconnections having extended contours, e.g. pads having mesh shape or interconnections comprising connected parallel stripes · CPC title