Semiconductor device, manufacturing method thereof, and display device
US-9219157-B2 · Dec 22, 2015 · US
Display device
US9105594B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9105594-B2 |
| Application number | US-201213594944-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 27, 2012 |
| Priority date | Aug 8, 2001 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
In a display device having driving circuits formed on the same substrate where pixels are formed, the lateral frame area of the display device is reduced. A gate signal line driving circuit is placed in parallel with a source signal line driving circuit, so that no driving circuits are provided in at least two opposing directions out of four directions with respect to a pixel region. With the above-described structure, the area the gate signal line driving circuit occupies in prior art is removed to reduce the width (side to side) of the display device. Therefore a display device that has a small frame area in the lateral direction can be provided.
First claim
Opening claim text (preview).
What is claimed is: 1. A display device comprising: a first substrate comprising; a portion being substantially square with a first side, a second side, a third side and a fourth side, the portion comprising a plurality of pixels arranged in a matrix; a first driving circuit; a second driving circuit; a plurality of first signal lines; a plurality of second signal lines; and an FPC; a second substrate opposing to the first substrate; and a sealing member bonding t…
Assignees
Inventors
Classifications
- G02F1/13454Primary
Physics · mapped topic
- H01L27/3276Primary
Electricity · mapped topic
Physics · mapped topic
Electricity · mapped topic
- G09G3/20Primary
Physics · mapped topic
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Frequently asked questions
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- What does patent US9105594B2 cover?
- In a display device having driving circuits formed on the same substrate where pixels are formed, the lateral frame area of the display device is reduced. A gate signal line driving circuit is placed in parallel with a source signal line driving circuit, so that no driving circuits are provided in at least two opposing directions out of four directions with respect to a pixel region. With the a…
- Who is the assignee on this patent?
- Yamazaki Shunpei, Koyama Jun, Semiconductor Energy Lab
- What technology area does this patent fall under?
- Primary CPC classification G02F1/13454. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).