Semiconductor device including image sensor and method of forming the same
US-2024379711-A1 · Nov 14, 2024 · US
Sparsely-bonded CMOS hybrid imager
US9105548B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9105548-B2 |
| Application number | US-201213531204-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 22, 2012 |
| Priority date | Jun 22, 2011 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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Abstract
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A method and device for imaging or detecting electromagnetic radiation is provided. A device structure includes a first chip interconnected with a second chip. The first chip includes a detector array, wherein the detector array comprises a plurality of light sensors and one or more transistors. The second chip includes a Read Out Integrated Circuit (ROIC) that reads out, via the transistors, a signal produced by the light sensors. A number of interconnects between the ROIC and the detector array can be less than one per light sensor or pixel.
First claim
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What is claimed is: 1. A device structure, comprising: a first chip comprising a detector array, the detector array comprising a plurality of pixels disposed in rows and columns, each of the pixels including a light sensor and transistors, and the transistors comprising a buffer transistor, a select transistor, and a reset transistor; interconnects having a number corresponding to less than one of the interconnects per light sensor, including: one or more reset interconnects in…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US9105548B2 cover?
- A method and device for imaging or detecting electromagnetic radiation is provided. A device structure includes a first chip interconnected with a second chip. The first chip includes a detector array, wherein the detector array comprises a plurality of light sensors and one or more transistors. The second chip includes a Read Out Integrated Circuit (ROIC) that reads out, via the transistors, a…
- Who is the assignee on this patent?
- Cunningham Thomas J, Hancock Bruce R, Sun Chao, and 8 more
- What technology area does this patent fall under?
- Primary CPC classification H10F39/18. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).