Method of fabricating a thin film transistor array substrate

Patent metadata

Field	Value
Publication number	US-9105524-B2
Application number	US-201314079184-A
Country	US
Kind code	B2
Filing date	Nov 13, 2013
Priority date	Apr 30, 2013
Publication date	Aug 11, 2015
Grant date	Aug 11, 2015

Abstract

A thin film transistor array substrate including a gate line and a data line formed on a substrate, the gate and data lines crossing each other; a gate insulation film formed between the gate and data lines; a gate electrode formed at an intersection of the gate and data lines; an active layer formed on the gate insulation film to overlap the gate electrode; an etch stop layer formed on the active layer to define a channel region of the active layer; and a source electrode and a drain electrode formed on the active layer to partially overlap the active layer. The etch stop layer is between the source and drain electrodes, and the source and drain electrodes are spaced apart from the etch stop layer.

First claim

What is claimed is:

1. A method of fabricating a thin film transistor array substrate, the method comprising:
forming a gate electrode on a substrate;
forming a gate insulation film on the substrate on the gate electrode;
forming an active layer on the gate insulation film;
forming an etch stop layer to define a channel region of the active layer;
sequentially forming a barrier layer and a metal layer on the gate insulation film, the active layer, and the etch stop layer;…

Assignees

• Lg Display Co Ltd

Inventors

• Choi Hee Dong

Classifications

• H10D30/6704

  Electricity · mapped topic

• H10D30/0316

  Electricity · mapped topic

• H10D86/441

  Electricity · mapped topic

• H10D30/6729 Primary

  Electricity · mapped topic

• H10D86/423

  Electricity · mapped topic