SONOS stack with split nitride memory layer

Patent metadata

Field	Value
Publication number	US-9105512-B2
Application number	US-201414265129-A
Country	US
Kind code	B2
Filing date	Apr 29, 2014
Priority date	Apr 24, 2009
Publication date	Aug 11, 2015
Grant date	Aug 11, 2015

Abstract

A semiconductor device and method of manufacturing the same are provided. In one embodiment, semiconductor device includes a first oxide layer overlying a channel connecting a source and a drain formed in a substrate, a first nitride layer overlying the first oxide layer, a second oxide layer overlying the first nitride layer and a second nitride layer overlying the second oxide layer. A dielectric layer overlies the second nitride layer and a gate layer overlies the dielectric layer. The second nitride layer is oxygen-rich relative to the second nitride layer and includes a majority of the charge traps. Other embodiments are also described.

First claim

What is claimed is:

1. A semiconductor device comprising:
a first oxide layer overlying a channel connecting a source and a drain formed in a substrate;
a first nitride layer overlying the first oxide layer;
a second oxide layer overlying the first nitride layer;
a second nitride layer overlying the second oxide layer;
a dielectric layer overlying the second nitride layer; and
a gate layer overlying the dielectric layer,
wherein the first nitride layer is oxygen-rich r…

Assignees

• Cypress Semiconductor Corp

Inventors

• Jenne Fredrick B
• Ramkumar Krishnaswamy

Classifications

• H10P14/6519

  Electricity · mapped topic

• H10P14/662

  Electricity · mapped topic

• H10D64/685

  Electricity · mapped topic

• H10D30/694

  Electricity · mapped topic

• H10D30/69

  Electricity · mapped topic