Chamfering apparatus and method for manufacturing notchless wafer
US-2016300708-A1 · Oct 13, 2016 · US
Wafer edge conditioning for thinned wafers
US9105465B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9105465-B2 |
| Application number | US-201113053803-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 22, 2011 |
| Priority date | Mar 22, 2011 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
The present invention relates to a method for minimizing breakage of wafers during or after a wafer thinning process. A method of forming a rounded edge to the portion of a wafer remaining after surface grinding process is provided. The method comprises providing a semiconductor wafer having an edge and forming a recess in the edge of the wafer using any suitable mechanical or chemical process. The method further comprises forming a substantially continuous curved shape for at least the edge of the wafer located above the recess. Advantageously, the shape of the wafer is formed prior to the backside grind process to prevent problems caused by the otherwise presence of a sharp edge during the backside grind process.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for thinning a semiconductor wafer to a desired final thickness, the method comprising: providing a semiconductor wafer having a top surface, a bottom surface, and an edge; forming a substantially continuous curved shape in the edge, the curved shape having: a first convex shape at the top surface having radius of curvature such that twice the radius of curvature is approximately, but not less than, the desired final thickness; a concave shape…
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Classifications
- H10P90/128Primary
Electricity · mapped topic
- H01L21/02021Primary
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9105465B2 cover?
- The present invention relates to a method for minimizing breakage of wafers during or after a wafer thinning process. A method of forming a rounded edge to the portion of a wafer remaining after surface grinding process is provided. The method comprises providing a semiconductor wafer having an edge and forming a recess in the edge of the wafer using any suitable mechanical or chemical process.…
- Who is the assignee on this patent?
- Daubenspeck Timothy Harrison, Gambino Jeffrey P, Muzzy Christopher David, and 3 more
- What technology area does this patent fall under?
- Primary CPC classification H10P90/128. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).