Package substrate and semiconductor package including the same
US-2024429153-A1 · Dec 26, 2024 · US
Semiconductor device
US9105463B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9105463-B2 |
| Application number | US-201314140656-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 26, 2013 |
| Priority date | Nov 10, 2011 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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Abstract
Official abstract text for this publication.
A semiconductor device includes an extended semiconductor chip including a first semiconductor chip and an extension outwardly extending from a side surface of the first semiconductor chip; and a second semiconductor chip connected to the extended semiconductor chip through a plurality of bumps and electrically connected to the first semiconductor chip. The first semiconductor chip is smaller than the second semiconductor chip. At least one external terminal is provided on the extension.
First claim
Opening claim text (preview).
What is claimed is: 1. A semiconductor device comprising: an extended semiconductor chip including a first semiconductor chip and an extension outwardly extending from a side surface of the first semiconductor chip; and a second semiconductor chip connected to the extended semiconductor chip through a plurality of bumps and electrically connected to the first semiconductor chip, wherein the first semiconductor chip is smaller than the second semiconductor chip, at least…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9105463B2 cover?
- A semiconductor device includes an extended semiconductor chip including a first semiconductor chip and an extension outwardly extending from a side surface of the first semiconductor chip; and a second semiconductor chip connected to the extended semiconductor chip through a plurality of bumps and electrically connected to the first semiconductor chip. The first semiconductor chip is smaller t…
- Who is the assignee on this patent?
- Panasonic Corp
- What technology area does this patent fall under?
- Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).