Page buffer performing memory operation
US-2024274171-A1 · Aug 15, 2024 · US
US9105348B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9105348-B2 |
| Application number | US-201414227786-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 27, 2014 |
| Priority date | Mar 28, 2013 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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An electronic device according to the present technique includes a non-volatile memory in which a program is stored, a volatile memory in which the program read from the non-volatile memory is stored, a controller part for controlling operations of the non-volatile memory and the volatile memory, and a power supply controller for controlling power to the controller part and the volatile memory. The controller part includes a power supply part and a signal fixing part. The power supply part is separated from another power supply line, and power for an interface signal of the volatile memory is supplied from the power supply part thereto. A voltage is supplied from the power supply part to the signal fixing part, and the signal fixing part fixes an output logic of the signal supplied to the volatile memory according to the signal from the power supply controller.
Opening claim text (preview).
What is claimed is: 1. An electronic device comprising: a non-volatile memory in which a program is stored; a volatile memory in which the program read from the non-volatile memory is stored; a controller for controlling operations of the non-volatile memory and the volatile memory, the controller being coupled to the non-volatile memory and the volatile memory; a power supply controller for controlling power to the controller and the volatile memory and supplying a control…
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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