Logic drive using standard commodity programmable logic ic chips comprising non-volatile random access memory cells
US-2024380401-A1 · Nov 14, 2024 · US
Read circuit for memory
US9105342B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9105342-B2 |
| Application number | US-201313755853-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 31, 2013 |
| Priority date | Jan 31, 2013 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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Abstract
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Embodiments are directed to detecting a state of a memory element in a memory device, comprising: applying a pulse of a predetermined magnitude and duration to the memory element to induce a transition in the state of the memory element when a polarity of the pulse is opposite to the state, monitoring, by a device, a signal associated with the memory element to detect a presence or absence of a transition in the signal in an amount greater than a threshold, and determining the state of the memory element based on said monitoring.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for detecting a state of a memory element in a memory device, comprising: applying, during a read operation of the memory element, a voltage pulse of a predetermined magnitude and duration to the memory element that is sufficient to induce a transition in the state of the memory element when a polarity of the pulse is opposite to the state; monitoring, by a device, a current passing though the memory element as a result of the applied voltage puls…
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Physics · mapped topic
- G11C11/1673Primary
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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- What does patent US9105342B2 cover?
- Embodiments are directed to detecting a state of a memory element in a memory device, comprising: applying a pulse of a predetermined magnitude and duration to the memory element to induce a transition in the state of the memory element when a polarity of the pulse is opposite to the state, monitoring, by a device, a signal associated with the memory element to detect a presence or absence of a…
- Who is the assignee on this patent?
- IBM, Headway Technologies Inc
- What technology area does this patent fall under?
- Primary CPC classification G11C11/1673. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).