Systems and methods for acoustic wave enabled data storage
US-2015371687-A1 · Dec 24, 2015 · US
Gate driving circuit and display device using the same
US9105329B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9105329-B2 |
| Application number | US-201213708635-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 7, 2012 |
| Priority date | Jul 31, 2012 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
How to read this patent
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
- Title
What the patent document calls the invention.
- Abstract
A short plain-language summary of the technical disclosure.
- Assignees and inventors
Who owns or filed the patent and who is credited as inventor.
- Key dates
Filing, priority, publication, and grant dates set the timeline.
- First independent claim
The legal scope of protection — read this for what is actually claimed.
- CPC / IPC classifications
Technology tags used to group this patent with similar filings.
- Citations and related patents
Prior art links and similar publications in this corpus.
Abstract
Official abstract text for this publication.
An embodiments herein relate to a gate driving circuit and display device which include a plurality of shift registers. The gate driving circuit comprises: a plurality of shift registers, wherein each of the shift registers includes a plurality of stages which sequentially output a gate signal, wherein the stages of a kth shift register are activated when a kth SR selection signal generated as a first logic level voltage is input, and the stages of the kth shift register are not activated when the kth SR selection signal generated as a second logic level voltage is input, wherein k is a natural number equal to or less than the number of the shift registers.
First claim
Opening claim text (preview).
What is claimed is: 1. A gate driving circuit comprising: a plurality of shift registers, wherein each of the shift registers includes a plurality of stages which sequentially output a gate signal, wherein the stages of a kth shift register are activated when a kth SR selection signal generated as a first logic level voltage is input, and the stages of the kth shift register are not activated when the kth SR selection signal generated as a second logic level voltage is input,…
Assignees
Inventors
Classifications
- G11C19/00Primary
Physics · mapped topic
- G11C19/287Primary
Physics · mapped topic
- G09G3/20Primary
Physics · mapped topic
Patent family
Related publications grouped by family.
External sources
Next steps
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US9105329B2 cover?
- An embodiments herein relate to a gate driving circuit and display device which include a plurality of shift registers. The gate driving circuit comprises: a plurality of shift registers, wherein each of the shift registers includes a plurality of stages which sequentially output a gate signal, wherein the stages of a kth shift register are activated when a kth SR selection signal generated as …
- Who is the assignee on this patent?
- Lg Display Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification G11C19/00. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).