Memory controller for strobe-based memory systems

Patent metadata

Field	Value
Publication number	US-9105325-B2
Application number	US-201414284312-A
Country	US
Kind code	B2
Filing date	May 21, 2014
Priority date	Dec 21, 2004
Publication date	Aug 11, 2015
Grant date	Aug 11, 2015

Abstract

An integrated circuit (IC) memory controller is disclosed. The memory controller includes a receiver to receive a strobe signal and provide an internal strobe signal. An adjustable delay circuit delays an enable signal to generate a delayed enable signal. A gate circuit generates a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal. A sample circuit samples data using the gated strobe signal.

First claim

What is claimed is:

1. An integrated circuit (IC) memory controller comprising:
a receiver to receive a strobe signal and provide an internal strobe signal;
an adjustable delay circuit that delays an enable signal to generate a delayed enable signal;
a gate circuit to generate a gated strobe signal using the delayed enable signal that masks transitions of the internal strobe signal that occur prior to a valid region of the internal strobe signal; and
a sample circuit to samp…

Assignees

• Rambus Inc

Inventors

• Kizer Jade M
• Doraiswamy Sivakumar
• Lau Benedict

Classifications

• G06F13/405

  Physics · mapped topic

• G06F13/1689 Primary

  Physics · mapped topic

• G11C11/4076 Primary

  Physics · mapped topic

• G11C11/4072

  Physics · mapped topic

• G11C11/4063

  Physics · mapped topic