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System and method of programming a memory cell
US9105310B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9105310-B2 |
| Application number | US-201313759310-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 5, 2013 |
| Priority date | Feb 5, 2013 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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Abstract
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A method includes creating a breakdown condition at a semiconductor transistor structure that includes an overlap region and a channel region. The breakdown condition is created by causing a first voltage difference between a gate of the semiconductor transistor structure and the overlap region to exceed a breakdown voltage of the semiconductor transistor structure while maintaining a second voltage difference between the gate and the channel region at less than the breakdown voltage.
First claim
Opening claim text (preview).
What is claimed is: 1. A method comprising: creating a breakdown condition at a semiconductor transistor structure that includes an overlap region and a channel region by causing a first voltage difference between a gate and the overlap region to exceed a breakdown voltage of the semiconductor transistor structure while maintaining a second voltage difference between the gate and the channel region at less than the breakdown voltage, wherein the breakdown condition is based on a…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Physics · mapped topic
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Frequently asked questions
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- What does patent US9105310B2 cover?
- A method includes creating a breakdown condition at a semiconductor transistor structure that includes an overlap region and a channel region. The breakdown condition is created by causing a first voltage difference between a gate of the semiconductor transistor structure and the overlap region to exceed a breakdown voltage of the semiconductor transistor structure while maintaining a second vo…
- Who is the assignee on this patent?
- Qualcomm Inc
- What technology area does this patent fall under?
- Primary CPC classification G11C17/16. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).