Display device
US-2024431161-A1 · Dec 26, 2024 · US
Display device with modulated gate-on gate-off voltages and driving method thereof
US9105225B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9105225-B2 |
| Application number | US-201213603863-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 5, 2012 |
| Priority date | May 23, 2012 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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Abstract
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A display panel includes a plurality of gate lines and a plurality of pixels disposed thereon, a gate driver which applies a gate signal to the gate lines, and a controller which controls the gate driver, where the controller includes a signal controller which generates a scanning start signal and a gate clock signal comprising a plurality of pulses, where the scanning start signal instructs to start a scanning of the gate signal, and a driving voltage modulator which generates a modulated gate-on voltage and a modulated gate-off voltage based on a basic gate-on voltage and a basic gate-off voltage, where the driving voltage modulator adds an overshoot voltage corresponding to a rising edge of a pulse of the gate clock signal to the basic gate-on voltage or adds an undershoot voltage corresponding to a falling edge of the pulse of the gate clock signal to the basic gate-off voltage.
First claim
Opening claim text (preview).
What is claimed is: 1. A display device comprising: a display panel comprising a plurality of gate lines and a plurality of pixels disposed thereon; a gate driver which applies a gate signal to the gate lines; and a controller which controls the gate driver; wherein the controller comprises: a signal controller which generates a scanning start signal and a gate clock signal comprising a plurality of pulses, wherein the scanning start signal instructs to start a scanning of…
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- G09G3/20Primary
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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Frequently asked questions
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- What does patent US9105225B2 cover?
- A display panel includes a plurality of gate lines and a plurality of pixels disposed thereon, a gate driver which applies a gate signal to the gate lines, and a controller which controls the gate driver, where the controller includes a signal controller which generates a scanning start signal and a gate clock signal comprising a plurality of pulses, where the scanning start signal instructs to…
- Who is the assignee on this patent?
- Kim Hun Tae, Samsung Display Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification G09G3/20. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).