Method for sharing a storage device among multiple processors and associated electronic device
US-2024211415-A1 · Jun 27, 2024 · US
US9104636B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9104636-B2 |
| Application number | US-201113027482-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 15, 2011 |
| Priority date | Oct 26, 2010 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A memory managing apparatus manages a memory shared by processors. The apparatus includes an allocator, an updater and a releaser. The allocator secures a memory area in the memory allocated to each processor based on a request of each processor and registers reference counters corresponding one-to-one to the processors. The updater adds 1 to a value of the reference counter corresponding to the processor managing the memory area when the memory area is allocated to each processor and subtracts 1 from the value of the reference counter corresponding to the processor managing the memory area when the memory area is released from the processor to which the memory area is allocated. The releaser releases the memory area from the processor to which the memory area is allocated when a sum of the values of the reference counters in the memory area updated by the updater is 0.
Opening claim text (preview).
The invention claimed is: 1. A processor sharing a shared memory shared by a plurality of processors, the shared memory comprising an allocation memory block and a management memory block, the processor comprising: an allocator configured to secure a memory area in the shared memory allocated to each of the processors based on a request of each of the processors, and register a plurality of reference counters corresponding one-to-one to the processors; an updater configured to a…
Physics · mapped topic
Related publications grouped by family.
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Answers are generated from the same data shown on this page.