Detecting deadlocks involving inter-processor interrupts
US-2015378791-A1 · Dec 31, 2015 · US
Array object concurrency in STM
US9104628B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9104628-B2 |
| Application number | US-201514594119-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 10, 2015 |
| Priority date | Oct 1, 2008 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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Abstract
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A software transactional memory system is provided that creates an array of transactional locks for each array object that is accessed by transactions. The system divides the array object into non-overlapping portions and associates each portion with a different transactional lock. The system acquires transactional locks for transactions that access corresponding portions of the array object. By doing so, different portions of the array object can be accessed by different transactions concurrently. The system may use a shared shadow or undo copy for accesses to the array object.
First claim
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What is claimed is: 1. A software transactional memory (STM) system to create a plurality of transactional locks for a plurality of respective portions of an array object, the system comprising: one or more processors; a first component configured to, in accordance with a determining step, determine whether a single transactional lock or the plurality of transactional locks is to be allocated for an array object based on a size of the array object, the size of the array object b…
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Physics · mapped topic
Physics · mapped topic
- G06F12/1466Primary
Physics · mapped topic
- G06F9/526Primary
Physics · mapped topic
Physics · mapped topic
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- What does patent US9104628B2 cover?
- A software transactional memory system is provided that creates an array of transactional locks for each array object that is accessed by transactions. The system divides the array object into non-overlapping portions and associates each portion with a different transactional lock. The system acquires transactional locks for transactions that access corresponding portions of the array object. B…
- Who is the assignee on this patent?
- Microsoft Technology Licensing Llc
- What technology area does this patent fall under?
- Primary CPC classification G06F12/1466. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).