Persisting data across warm boots

US9104619B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9104619-B2
Application numberUS-84294510-A
CountryUS
Kind codeB2
Filing dateJul 23, 2010
Priority dateJul 23, 2010
Publication dateAug 11, 2015
Grant dateAug 11, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Techniques for persisting data stored in volatile memory across a warm boot. One or more portions (referred to as “warm memory”) of volatile memory of the system can be reserved and configured such that the data stored by these portions is not affected by a warm boot thereby resulting in the data stored being persisted across a warm boot.

First claim

Opening claim text (preview).

What is claimed is: 1. A system comprising: a processing element; and a volatile memory associated with the processing element, the volatile memory comprising a memory section for persisting data stored in the memory section across a warm boot of the system, the memory section comprising a first memory portion allocated for a subscriber and a second memory portion, the first memory portion storing reference information usable for accessing data stored by the subscriber in the second memory portion; the system programmed to perform a warm boot, the warm boot causing an operating system of the system to be restarted without cycling power to the system; and after performing the warm boot, the system further programmed to enable the subscriber to retrieve the data stored by the subscriber in the second memory portion using the reference information stored in the first memory portion. 2. The system of claim 1 wherein the processing element is a single processor, a group of processors, or a set of cores of a plurality of processors, wherein the set of cores comprises cores from one or more of the plurality of processors. 3. The system of claim 1 wherein the subscriber is an application, or a thread executed by the processing element. 4. The system of claim 1 wherein the subscriber is a device driver. 5. A network device comprising the system of claim 1 . 6. The system of claim 1 wherein the system is further programmed to enable the subscriber to provide a size for the memory section that is to be allocated for the subscriber. 7. The system of claim 1 wherein the system is further programmed to enable the subscriber to use an Application Programmer Interface (API) to allocate the memory section of the volatile memory for persisting stored data across a warm boot of the system. 8. The system of claim 1 wherein the system is further programmed to enable the subscriber to allocate the first memory portion using an Application Specific Interface (API). 9. The system of claim 1 wherein the system is further programmed to enable the subscriber to allocate the second memory portion using an Application Specific Interface (API). 10. The system of claim 1 wherein after performing the warm reboot the system is programmed to initialize the memory management unit (MMU) to present the first memory portion and the second memory portion at the same virtual address as before the warm reboot. 11. The system of claim 1 wherein the system is further programmed to enable the subscriber to retrieve the data stored by the subscriber in the second memory portion using the reference information stored in the first memory portion in less than 10 msecs after the system initiates the warm boot. 12. The system of claim 1 , wherein the system is further programmed to enable the subscriber to control the size of the allocation of the first memory portion using an Application Specific Interface (API). 13. The system of claim 1 , wherein the system is further programmed to enable the subscriber to control the size of the allocation of the second memory portion using an Application Specific Interface (API). 14. The system of claim 1 wherein the processing element is a core cores of a multi-core processor. 15. The system of claim 1 wherein the subscriber is a process executed by the processing element. 16. The system of claim 1 wherein the subscriber is an operating system. 17. The system of claim 1 where the subscriber is a hypervisor. 18. A method comprising: allocating, by a subscriber, a memory section of volatile memory for persisting stored data across a warm boot, the volatile memory associated with a processing element; allocating, by the subscriber, a first memory portion and a second memory portion of the memory section for a subscriber; storing, by the subscriber, a reference to the second memory portion in the first memory portion; storing, by the subscriber, data in a second memory portion of the memory section; and retrieving, by the subscriber, the stored data from the second memory portion using the reference stored in the first memory portion, after a warm boot of the system, wherein the warm boot causes an operating system to be restarted without cycling power to the processing element. 19. The method of claim 18 wherein the processing element is a single processor, a group of processors, a core of a multi-core processor, or a set of cores of a plurality of processors, wherein the set of cores comprises cores from one or more of the plurality of processors. 20. The method of claim 18 wherein the subscriber is an application, a process, or a thread executed by the processing element. 21. The method of claim 18 wherein the subscriber is an operating system, a hypervisor, or a device driver. 22. The method of claim 18 wherein the subscriber provides a size for the memory section that is to be allocated for the subscriber. 23. The method of claim 18 wherein the subscriber uses an Application Programmer Interface (API) to allocate the memory section of the volatile memory for persisting stored data across a warm boot of the system.

Assignees

Inventors

Classifications

  • Resetting means · CPC title

  • Program loading or initiating (bootstrapping G06F9/4401; security arrangements for program loading or initiating G06F21/57) · CPC title

  • Bootstrapping (security arrangements therefor G06F21/57) · CPC title

  • Resetting or repowering · CPC title

  • Suspend and resume; Hibernate and awake · CPC title

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Frequently asked questions

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What does patent US9104619B2 cover?
Techniques for persisting data stored in volatile memory across a warm boot. One or more portions (referred to as “warm memory”) of volatile memory of the system can be reserved and configured such that the data stored by these portions is not affected by a warm boot thereby resulting in the data stored being persisted across a warm boot.
Who is the assignee on this patent?
Chin Bill Ying, Ratner Ilya, Desai Tushar, and 3 more
What technology area does this patent fall under?
Primary CPC classification G06F11/1441. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).