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US-12181993-B1 · Dec 31, 2024 · US
Reduced-impact error recovery in multi-core storage-system components
US9104575B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9104575-B2 |
| Application number | US-201213589128-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 18, 2012 |
| Priority date | Aug 18, 2012 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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Abstract
Official abstract text for this publication.
A method for recovering from an error in a multi-core storage-system component is disclosed. In one embodiment, such a method includes detecting an error in a first core of a multi-core component. The method determines whether the error was one of (1) detected by the first core; and (2) detected by a core other than the first core. In the event the error was detected by the first core and the error is recoverable, the first core recovers from the error without substantially impacting operation of other cores in the multi-core component. In the event the error was detected by a core other than the first core and the error is recoverable, a core other than the first core recovers from the error without substantially impacting operation of other cores in the multi-core component. A corresponding apparatus and computer program product are also disclosed.
First claim
Opening claim text (preview).
The invention claimed is: 1. A method for recovering from an error in a multi-core storage-system component (hereinafter “multi-core component”), the method comprising: detecting an error in a first core of a multi-core component; maintaining an error count for the first core, the error count keeping track of a number of errors experienced by the first core; in the event the error count has reached a threshold value, withdrawing the first core from service in the multi-core c…
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Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
- G06F11/0793Primary
Physics · mapped topic
Physics · mapped topic
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Frequently asked questions
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- What does patent US9104575B2 cover?
- A method for recovering from an error in a multi-core storage-system component is disclosed. In one embodiment, such a method includes detecting an error in a first core of a multi-core component. The method determines whether the error was one of (1) detected by the first core; and (2) detected by a core other than the first core. In the event the error was detected by the first core and the e…
- Who is the assignee on this patent?
- Holley Bret Wayne, Kumar Ashwani, Pham Tiep Quoc, and 1 more
- What technology area does this patent fall under?
- Primary CPC classification G06F11/0793. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).