Early data delivery prior to error detection completion

Patent metadata

Field	Value
Publication number	US-9104564-B2
Application number	US-201414501101-A
Country	US
Kind code	B2
Filing date	Sep 30, 2014
Priority date	Mar 15, 2013
Publication date	Aug 11, 2015
Grant date	Aug 11, 2015

Abstract

A computer implemented method for early data delivery prior to error detection completion in a memory system includes receiving a frame of a multi-frame data block at a memory control unit interface. A controller writes the frame to a buffer control block in a memory controller nest domain. The frame is read from the buffer control block by a cache subsystem interface in a system domain prior to completion of error detection of the multi-frame data block. Error detection is performed on the frame by an error detector in the memory controller nest domain. Based on detecting an error in the frame, an intercept signal is sent from the memory controller nest domain to a correction pipeline in the system domain. The intercept signal indicates that error correction is needed prior to writing data in the frame to a cache subsystem.

First claim

What is claimed is:

1. A computer implemented method for early data delivery prior to error detection completion in a memory system, the method comprising:
receiving a frame of a multi-frame data block at a memory control unit interface;
writing, by a controller, the frame to a buffer control block in a memory controller nest domain;
reading the frame from the buffer control block by a cache subsystem interface in a system domain prior to completion of error detection of the m…

Assignees

• IBM

Inventors

• Gilda Glenn D
• Hodges Mark R
• Papazova Vesselina K
• Meaney Patrick J

Classifications

• G06F11/08

  Physics · mapped topic

• G06F11/073 Primary

  Physics · mapped topic

• G06F11/0793

  Physics · mapped topic