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Storage apparatus, storage controller and method for relocating data in solid state drive
US9104554B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9104554-B2 |
| Application number | US-201313849073-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 22, 2013 |
| Priority date | Sep 25, 2012 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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Abstract
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According to one embodiment, a storage controller comprises an access statistic collection unit, a selection unit and a rewrite unit. The access statistic collection unit collects write frequencies of a plurality of small logical address areas having a predetermined size which configure a logical area of a logical unit defined using a solid state drive. The selection unit selects a set of first small logical address areas having low write frequencies from the logical unit. The rewrite unit collectively rewrites data of the set of the first small logical address areas to the solid state drive, and collectively rewrites data of a set of remaining second small logical address areas to the solid state drive.
First claim
Opening claim text (preview).
What is claimed is: 1. A storage apparatus comprising: a first solid state drive; and a storage controller configured to control the first solid state drive, wherein the storage controller comprises a logical unit management unit configured to define a logical unit including a logical area to which a physical area of the first solid state drive is allocated, an access statistic collection unit configured to collect write frequencies of a plurality of logical address areas…
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Physics · mapped topic
- G06F12/0246Primary
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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Frequently asked questions
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- What does patent US9104554B2 cover?
- According to one embodiment, a storage controller comprises an access statistic collection unit, a selection unit and a rewrite unit. The access statistic collection unit collects write frequencies of a plurality of small logical address areas having a predetermined size which configure a logical area of a logical unit defined using a solid state drive. The selection unit selects a set of first…
- Who is the assignee on this patent?
- Toshiba Kk, Toshiba Solutions Corp
- What technology area does this patent fall under?
- Primary CPC classification G06F12/0246. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).