Data storage device and method for flash block management

US9104549B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9104549-B2
Application numberUS-201213484218-A
CountryUS
Kind codeB2
Filing dateMay 30, 2012
Priority dateMay 18, 2012
Publication dateAug 11, 2015
Grant dateAug 11, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

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A data storage device is coupled to a host and includes a flash memory and a controller. The flash memory comprises a spare block pool and a data block pool, wherein the spare block pool comprises a plurality of spare blocks, and the data block pool comprises a plurality of data blocks, wherein a spare block count indicates a total number of the spare blocks. The controller receives target data from the host, writes the target data to a current data block, determines whether a current programming page is the first page of the current data block, determines whether the spare block count is less than a spare block count threshold when the current programming page is the first page, and sets data move information for a data merge process when the spare block count is less than the spare block count threshold.

First claim

Opening claim text (preview).

What is claimed is: 1. A data storage device, coupled to a host, comprising: a flash memory, comprising a spare block pool and a data block pool, wherein the spare block pool comprises a plurality of spare blocks, and the data block pool comprises a plurality of data blocks, wherein a spare block count indicates a total number of the spare blocks; and a controller, receiving target data from the host, writing the target data to a current data block, determining whether a current programming page is the first page of the current data block, determining whether the spare block count is less than a spare block count threshold when the current programming page is the first page, and setting data move information for a data merge process when the spare block count is less than the spare block count threshold, wherein when the current page is not the first page, the controller determines whether the data move information is set, and when the data move information is set, the controller performs a data merge process according to the data move information within a limited time period, wherein the limited time period is determined by a standard for data transmission between the data storage device and the host. 2. The data storage device as claimed in claim 1 , wherein the data move information for the data merge process comprises physical addresses of a plurality of source data blocks with data to be merged and physical addresses of a destination spare block to which the merged data is written. 3. The data storage device as claimed in claim 2 , wherein when the controller sets the data move information for the data merge process, the controller selects the data blocks with minimum valid page counts from the data block pool as the source data blocks, obtains a destination spare block from the spare block pool, and erases the destination spare block. 4. The data storage device as claimed in claim 3 , wherein the data move information for the data merge process comprises physical addresses of a plurality of source data blocks and a destination spare block, and when the controller performs data merge process, the controller merges data stored in the source data blocks to obtain merged data, writes the merged data to the destination spare block. 5. The data storage device as claimed in claim 4 , wherein when the controller performs a data merge process within the limited time period, the controller selects a plurality of target pages with valid data from the source data blocks, and copies the valid data from the target pages to the destination spare block within the limited time period. 6. The data storage device as claimed in claim 4 , wherein after the data merge process is completed, the controller further puts the source data blocks to the spare block pool, puts the destination spare block to the data block pool, and adds a total number of the source data blocks to the spare block count. 7. The data storage device as claimed in claim 1 , wherein the spare block count threshold is 15. 8. A method for flash block management, wherein a data storage device is coupled to a host and comprises a flash memory and a controller, the flash memory comprises a spare block pool and a data block pool, the spare block pool comprises a plurality of spare blocks, the data block pool comprises a plurality of data blocks, and a spare block count indicates a total number of the spare blocks, the method comprising: receiving target data from the host; writing the target data to a current data block; determining whether a current programming page is the first page of the current data block; determining whether the spare block count is less than a spare block count threshold when the current page is the first page; setting data move information for a data merge process when the spare block count is less than the spare block count threshold; when the current page is not the first page, determining whether the data move information is set; and when the data move information is set, performing a data merge process according to the data move information within a limited time period, wherein the limited time period is determined by a standard for data transmission between the data storage device and the host. 9. The method as claimed in claim 8 , wherein the data move information for the data merge process comprises physical addresses of a plurality of source data blocks with data to be merged and physical addresses of a destination spare block to which the merged data is written. 10. The method as claimed in claim 9 , wherein setting of the data move information for the data merge process comprises: selecting the data blocks with minimum valid page counts from the data block pool as the source data blocks; obtaining a destination spare block from the spare block pool; and erasing the destination spare block. 11. The method as claimed in claim 8 , wherein the data move information for the data merge process comprises physical addresses of a plurality of source data blocks and a destination spare block, and performing of the data merge process comprises: merging data stored in the source data blocks to obtain merged data; writing the merged data to the destination spare block; and putting the source data blocks to the spare block pool. 12. The method as claimed in claim 11 , wherein performing of a portion of the data merge process within the limited time period comprises: selecting a plurality of target pages with valid data from the source data blocks; and copying the valid data from the target pages to the destination spare block within the limited time period. 13. The method as claimed in claim 11 , wherein the method further comprises: after the data merge process is completed, putting the source data blocks to the spare block pool, putting the destination spare block to the data block pool, and adding a total number of the source data blocks to the spare block count. 14. The method as claimed in claim 8 , wherein the spare block count threshold is 15.

Assignees

Inventors

Classifications

  • Wear leveling · CPC title

  • in block erasable memory, e.g. flash memory · CPC title

  • Cleaning, compaction, garbage collection, erase control · CPC title

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What does patent US9104549B2 cover?
A data storage device is coupled to a host and includes a flash memory and a controller. The flash memory comprises a spare block pool and a data block pool, wherein the spare block pool comprises a plurality of spare blocks, and the data block pool comprises a plurality of data blocks, wherein a spare block count indicates a total number of the spare blocks. The controller receives target data…
Who is the assignee on this patent?
Cheng Chang-Kai, Lin Yen-Hung, Silicon Motion Inc
What technology area does this patent fall under?
Primary CPC classification G06F12/0246. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).